RFR: 8366444: Add support for add/mul reduction operations for Float16

[Bhavana Kilambi]

On Fri, 26 Sep 2025 16:21:35 GMT, Marc Chevalier <mchevalier at openjdk.org> wrote:

> I seem to have a failure on `compiler/vectorization/TestFloat16VectorOperations.java` on aarch64 in `C2_MacroAssembler::neon_reduce_add_fp16(FloatRegister, FloatRegister, FloatRegister, unsigned int, FloatRegister)` at `src/hotspot/cpu/aarch64/c2_MacroAssembler_aarch64.cpp:1930`:
> 
> ```
> assert(vector_length_in_bytes == 8 || vector_length_in_bytes == 16) failed: unsupported
> ```

Hi, thanks for letting me know. However, I am unable to reproduce it on any of my machines. Would it be possible to share the JVM options used and also machines details. Thanks!

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PR Comment: https://git.openjdk.org/jdk/pull/27526#issuecomment-3361062146