RFR: 8366333: AArch64: Enhance SVE subword type implementation of vector compress [v3]

[Vladimir Ivanov]

On Mon, 29 Sep 2025 07:56:09 GMT, erifan <duke at openjdk.org> wrote:

>> src/hotspot/cpu/aarch64/c2_MacroAssembler_aarch64.cpp line 2274:
>> 
>>> 2272:   //                  mask  = 0 1 0 0 0 0 0 1 0 1 0 0 0 1 0 1, one character is 1 bit.
>>> 2273:   // Expected result: dst   = 0 0 0 0 0 0 0 0 0 0 0 p i g c a
>>> 2274:   sve_dup(vtmp3, B, 0);
>> 
>> For clarity, you could declare a local `FloatRegister vzr = vtmp3` and refer to it at all use sites. That would make things clearer.
>
> Done, thanks!

The following reads slightly better, but it's up to you how to shape it.

FloatRegister vzr = vtmp3;
sve_dup(vzr, B, 0);

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PR Review Comment: https://git.openjdk.org/jdk/pull/27188#discussion_r2388940972