mfence on i686 with volatile?
David Holmes - Sun Microsystems
David.Holmes at Sun.COM
Wed Nov 18 01:21:14 PST 2009
Tim Bell said the following on 11/18/09 18:22:
>
> Also - are you running your tests on a single-CPU machine? I recall HotSpot
> detects that and will elide any n-way synchronization measures if so...
Yes that should have been my first question :-) Thanks Tim. On x86 this
stuff is elided if running on only a single core/processor.
I just confirmed -client output showing the lock:addl "fences"
David
;; block B2 [8, 31]
0xca4f72b8: mov $0xc61f5590,%edx ;...ba90551f c6
; {oop('HelloWorld')}
0xca4f72bd: mov 0x1c0(%edx),%ecx ;...8b8ac001 0000
;*getstatic v
; - HelloWorld::run at 8 (line 10)
0xca4f72c3: add $0x14d,%ecx ;...81c14d01 0000
0xca4f72c9: mov %ecx,0x1c0(%edx) ;...898ac001 0000
0xca4f72cf: lock addl $0x0,(%esp) ;...f0830424 00
;*putstatic v
; - HelloWorld::run at 15 (line 10)
0xca4f72d4: mov 0x1c4(%edx),%ecx ;...8b8ac401 0000
;*getstatic v2
; - HelloWorld::run at 18 (line 11)
0xca4f72da: mov 0x1c0(%edx),%edi ;...8bbac001 0000
;*getstatic v
; - HelloWorld::run at 21 (line 11)
0xca4f72e0: add %edi,%ecx ;...03cf
0xca4f72e2: mov %ecx,0x1c4(%edx) ;...898ac401 0000
0xca4f72e8: lock addl $0x0,(%esp) ;...f0830424 00
;*putstatic v2
; - HelloWorld::run at 25 (line 11)
>> For x86 we should see a StoreLoad barrier after the assignment to v2:
>>
>> http://gee.cs.oswego.edu/dl/jmm/cookbook.html
>>
>> For -server printOptoAssembly shows our "mfence" replacement a lock:addl
>> (which is the implementation of membar-volatile().
>>
>> [ Got to go get hsdis myself to test printAssembly directly ]
>
> HTH-
>
> Tim
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