AARCH64: 8064611: Changes to HotSpot shared code

[Vladimir Kozlov]

I based the name on your comment:

+  // AArch64 uses store release (which does everything we need to keep
+  // the machine in order) but we still need a compiler barrier here.

You can name it as you like. Our main suggestion is to use such Boolean 
constant and normal if() statements instead of ifdef AARCH64 and 
AARCH64_ONLY/NOT_AARCH64 macros in C2 code (src/share/vm/opto/* files).

We already do similar things for PPC64 port which sets 
support_IRIW_for_* constant.

thanks,
Vladimir


On 11/20/14 6:25 AM, Andrew Haley wrote:
> On 11/19/2014 03:45 AM, Dean Long wrote:
>> On 11/18/2014 7:03 PM, Vladimir Kozlov wrote:
>>> Yes, we can hide AARCH64 using something similar to
>>> CODE_CACHE_SIZE_LIMIT macro which could be overwritten in platform
>>> specific files if needed: USE_STORE_RELEASE_FOR_VOLATILE.
>>> Or slightly more complicated declaration similar to
>>> support_IRIW_for_not_multiple_copy_atomic_cpu boolean constant.
>>>
>>> Dean, will it help us if we do that? If yes, then we should do that.
>>>
>> Yes, this will help us.  Following the boolean constant example, we
>> would have something like:
>>
>> #ifdef USE_STORE_RELEASE_FOR_VOLATILE
>> const bool use_store_release_for_volatile = true;
>> #else
>> const bool use_store_release_for_volatile = false;
>> #endif
>
> The problem with this is that the AArch64 stlr instruction isn't
> esactly store release, so is this #define rather misleading.  Other
> processors have store release instructions, but none of them do quite
> what the AArch64 does.
>
> But really I just want this patch to move forward, so I'll agree to
> anything which is not ridiculous.
>
> Andrew.
>