Release store in C2 putfield

[Aleksey Shipilev]

On 09/03/2014 09:00 PM, Andrew Haley wrote:
> On 09/03/2014 05:49 PM, Aleksey Shipilev wrote:
>> Why is a simple store is sufficient here for AArch64? Do the stores
>> ordered on AArch64 (I thought not)? I thought the "RC" part in
>> "RCsc" only applies to explicit synchronization instructions.
> 
> I discussed this with Peter Sewell, and it's explained in his 
> (co-authored) paper "A Tutorial Introduction to the ARM and POWER 
> Relaxed Memory Models" at 
> http://www.cl.cam.ac.uk/~pes20/ppc-supplemental/test7.pdf in Section
> 4.1, "Enforcing Order with Dependencies"
> 
> In the AArch64 spec, we have:
> 
> B2.7.2  Ordering requirements
> 
> If an address dependency exists between two reads or between a read 
> and a write, then those memory accesses are observed in program order
> by all observers within the shareability domain of the memory
> 
> So, an address dependency and a DMB when an object is created is all 
> we need.

Okay, I read that paper from Sewell et al. before. I don't quite believe
this is about "reading" the constructed objects, and so I don't see how
address dependencies are applicable here. If that part of HS code is
indeed about piggy-backing on address dependencies, and it is fine for
AArch64, then it is as well fine for all other architectures (except
Alpha)...

I do think this is an over-cautious secondary release when publishing
the reference to the field. History tells that block is added with PPC
changes:

$ hg log -r 5983
changeset:   5983:2113136690bc
parent:      5981:eb178e97560c
user:        goetz
date:        Fri Nov 15 11:05:32 2013 -0800
summary:     8024921: PPC64 (part 113): Extend Load and Store nodes to
know about memory ordering

I'm puzzled why do we have this in the code. Goetz? Maybe instead of
special-casing AArch64, PPC should be special-cased?

-Aleksey.