RFR(s): 8013171: G1: C1 x86_64 barriers use 32-bit accesses to 64-bit PtrQueue::_index

[Thomas Schatzl]

Hi Per,

On Mon, 2015-05-04 at 10:35 +0200, Per Liden wrote:
> On 2015-04-29 14:00, Per Liden wrote:
> > Hi,
> >
> > On 2015-04-27 18:20, Christian Thalinger wrote:
> >>
> >>> On Apr 23, 2015, at 9:40 AM, Per Liden <per.liden at oracle.com> wrote:
> >>>
[...]
> >>>> - post barrier stub: I would prefer if the 64 bit code did not
> >>>> push/pop the rdx register to free tmp. There are explicit rscratch1/2
> >>>> registers for temporaries available on that platform. At least
> >>>> rscratch1
> >>>> (=r8) seems to be used without save/restore in the original code
> >>>> already.
> >>>> This would also remove the need for 64 bit code to push/pop any
> >>>> register it
> >>>> seems to me.
> >>
> >> Sounds like a good suggestion if it doesn’t complicate the code too much.
> >
> > I'd like to avoid reintroducing different code paths for 32 and 64-bit,
> > which I think complicates the code. However, I can defer the pushing of
> > tmp until it's actually needed, which essentially gets us to the same
> > situation as before this change in terms of register usage for 64-bit.
> >
> > Updated webrev: http://cr.openjdk.java.net/~pliden/8013171/webrev.2/
> 
> Thomas/Roland, are you ok with the latest version?
> 

I am okay with it.

Thanks,
  Thomas