[9] RFR (S) 8157184: java/lang/invoke/LFCaching/LFMultiThreadCachingTest.java failed with a fatal error

[Vladimir Kozlov]

Thank you!

Vladimir K

On 5/19/16 10:21 AM, Vladimir Ivanov wrote:
> Reviewed.
>
> Best regards,
> Vladimir Ivanov
>
> On 5/19/16 8:18 PM, Vladimir Kozlov wrote:
>> https://bugs.openjdk.java.net/browse/JDK-8157184
>>
>> http://cr.openjdk.java.net/~kvn/8157184/webrev.00/
>>
>> Here is possible failure scenario:
>>
>> PICL is not installed on the failed SPARC machine as result
>> _L2_data_cache_line_size is 0 (unknown). In such situation we should not
>> use BIS instructions. But AllocatePrefetchInstr setting is not guarded
>> by cache_line_size > 0 check and BIS instruction is selected:
>>
>> The default value for AllocatePrefetchStepSize is 16 when
>> cache_line_size is 0 which is smaller then real cache line size (32).
>>
>> Flags values on crashing T5 machine:
>> Reserve for allocation:        24
>> AllocatePrefetchLines:         6
>> AllocateInstancePrefetchLines: 2
>> AllocatePrefetchDistance:      64
>> AllocatePrefetchStepSize:      16
>> AllocatePrefetchInstr:         1
>> AllocatePrefetchStyle:         3
>>
>>
>> _reserve_for_allocation_prefetch = (AllocatePrefetchDistance +
>> AllocatePrefetchStepSize * lines)
>>
>> It is not multiply of real cache line size since
>> AllocatePrefetchStepSize =16 < 32 bytes cache line on T5.
>>
>> And since we are using BIS instruction it can clean whole cache line if
>> it is executed for address aligned to the start of cache line and at the
>> end of reserved space: _reserve_for_allocation_prefetch -16. As result
>> it may clear values after reserved space (in following TLAB).
>>
>> Solution: add missing cache_line_size > 0 checks.
>>
>> Tested comp and jdk:tier1+tier2 RBT and forced _L2_data_cache_line_size
>> = 0.
>>
>> Thanks,
>> Vladimir