help understanding lock instruction in OrderAccess::fence()

David Holmes david.holmes at
Tue Nov 8 09:35:24 UTC 2016

On 8/11/2016 6:48 PM, 恶灵骑士 wrote:
> hotspot/src/os_cpu/linux_x86/vm/orderAccess_linux_x86.inline.hpp
> inline void OrderAccess::fence() {
>   if (os::is_MP()) {
>     // always use locked addl since mfence is sometimes expensive
> #ifdef AMD64
>     __asm__ volatile ("lock; addl $0,0(%%rsp)" : : : "cc", "memory");
> #else
>     __asm__ volatile ("lock; addl $0,0(%%esp)" : : : "cc", "memory");
> #endif
>   }
> }
> my classmates think that code “addl $0,0(%%esp)” having some specific effect,
> because esp points to the top of stack .
> it that true ?
> or the code “addl $0,0(%%esp)”  just equals no op,

It is a no-op - adding zero to a value.

> needing one operation after lock at least,  otherwise  lock instruction will produce an error .

"lock" is not an instruction, it is an instruction prefix, so has to go 
before some other instruction. The "lock" prefix acts as a storeload** 
barrier for x86 and as per the comment can be cheaper than an explicit 
mfence instruction.

**All the other barriers are implicit in the x86 memory model, so you 
only need to add a storeload barrier to get the necessary fence semantics.


> Thank you !
> Arron

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