JDK10/RFR(L): 8144448: Avoid placing CTI immediately following or preceding RDPC instruction.
Vladimir Kozlov
vladimir.kozlov at oracle.com
Thu Jun 15 17:51:09 UTC 2017
Patric,
assembler_sparc.cpp - may be use BytesPerInstWord instead of 4.
In sparc.ad in MachConstantBaseNode::emit() can you use nop() in case
disp == 0? To avoid changing O7 reg.
Thanks,
Vladimir
On 6/15/17 9:06 AM, Patric Hedlin wrote:
> Dear all,
>
> I would like to ask for help to review the following change/update:
>
> Issue: https://bugs.openjdk.java.net/browse/JDK-8144448
>
> Webrev: http://cr.openjdk.java.net/~neliasso/phedlin/tr8144448/
>
> Prerequisite: https://bugs.openjdk.java.net/browse/JDK-8181853
>
>
> *** As a comment to the discussion on how to simplify processing of
> "mundane" changes,
> this change/update comes with an additional prerequisite (patch)
> cleaning-up
> whitespace and two lingering uses of 'NOT_LP64' and 'LP64_ONLY'.
>
> Prerequisite: http://cr.openjdk.java.net/~neliasso/phedlin/tr8144448.pre/
>
>
> 8144448: Avoid placing CTI immediately following or preceding RDPC
> instruction.
>
> Approach taken here is to handle 'rdpc' in the same manner as
> 'cbcond', using
> a simple scheme to prohibit the assembler from emitting any 'rdpc'
> instruction
> back-to-back with other CTI ('rdpc' itself included), inserting
> 'nop' as needed.
>
>
> Caveat:
>
> This change is applied to all generations of SPARC cores event
> though it is the
> SPARC Core S5 that is the actual target. Benchmarking on T4 and M7
> suggests that
> there is no penalty. This choice (which is subject to change) has
> been made in
> order to give the update some mileage while waiting for Core S5
> hardware to be
> available in regular testing.
>
>
> Testing:
>
> Mostly tested on JDK9 (jtreg/RBT/hotspot/tier0-comp).
> Testing on JDK10 (jtreg/RBT/hotspot/precheckin-comp).
>
>
> Best regards,
> Patric
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