RFR: 8221554: aarch64 cross-modifying code [v6]

[Andrew Haley]

On 11/12/20 5:28 PM, Alan Hayward wrote:
> On Wed, 11 Nov 2020 15:04:32 GMT, Andrew Haley <aph at openjdk.org> wrote:
> 
>>> src/hotspot/cpu/aarch64/templateInterpreterGenerator_aarch64.cpp line 1413:
>>>
>>>> 1411:     __ blr(rscratch2);
>>>> 1412:     // An instruction sync is required here after the call into the VM. However,
>>>> 1413:     // that will have been caught in the VM by a cross_modify_fence call.
>>>
>>> I think this wording is confusing; I had to read it several times. 
>>>
>>> Would not something like
>>> '''
>>>     // When we return from the VM, the instruction stream may have
>>>     // been modified. Previously we emitted an ISB at this point, but
>>>     // it's now unnecessary because the VM itself calls cross_modify_fence()
>>> '''
>>>
>>> be better?
>>
>> This is still pending.
> 
> I wanted to avoid mentioning code that no longer exists. (Maybe it's best to just drop the comment?)

The comment only makes sense in the context of the code that was there
before.

> How about:
> 
> // When we return from the VM, the instruction stream may have
> // been modified. Therefore needs an isb is required. The VM will
> // have already done this by calling cross_modify_fence().

This is self contradicting: firstly you say and ISB is required, then
you say why it isn't.

-- 
Andrew Haley  (he/him)
Java Platform Lead Engineer
Red Hat UK Ltd. <https://www.redhat.com>
https://keybase.io/andrewhaley
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