RFR: 8266332: Adler32 intrinsic for x86 64-bit platforms

[Sandhya Viswanathan]

On Thu, 29 Apr 2021 23:47:17 GMT, Xubo Zhang <github.com+58006833+xbzhang99 at openjdk.org> wrote:

> Implement Adler32 intrinsic for x86 64-bit platform using vector instructions.
> 
> For the following benchmark:
> http://cr.openjdk.java.net/~pli/rfr/8216259/TestAdler32.java
> 
> The optimization shows ~5x improvement.
> 
> Base:
> Benchmark (count) Mode Cnt Score Error Units
> TestAdler32Perf.testAdler32Update 64 avgt 25 0.084 ± 0.001 us/op
> TestAdler32Perf.testAdler32Update 128 avgt 25 0.104 ± 0.001 us/op
> TestAdler32Perf.testAdler32Update 256 avgt 25 0.146 ± 0.002 us/op
> TestAdler32Perf.testAdler32Update 512 avgt 25 0.226 ± 0.002 us/op
> TestAdler32Perf.testAdler32Update 1024 avgt 25 0.390 ± 0.005 us/op
> TestAdler32Perf.testAdler32Update 2048 avgt 25 0.714 ± 0.007 us/op
> TestAdler32Perf.testAdler32Update 4096 avgt 25 1.359 ± 0.014 us/op
> TestAdler32Perf.testAdler32Update 8192 avgt 25 2.751 ± 0.023 us/op
> TestAdler32Perf.testAdler32Update 16384 avgt 25 5.494 ± 0.077 us/op
> TestAdler32Perf.testAdler32Update 32768 avgt 25 11.058 ± 0.160 us/op
> TestAdler32Perf.testAdler32Update 65536 avgt 25 22.198 ± 0.319 us/op
> 
> 
> With patch:
> Benchmark (count) Mode Cnt Score Error Units
> TestAdler32Perf.testAdler32Update 64 avgt 25 0.020 ± 0.001 us/op
> TestAdler32Perf.testAdler32Update 128 avgt 25 0.025 ± 0.001 us/op
> TestAdler32Perf.testAdler32Update 256 avgt 25 0.031 ± 0.001 us/op
> TestAdler32Perf.testAdler32Update 512 avgt 25 0.048 ± 0.001 us/op
> TestAdler32Perf.testAdler32Update 1024 avgt 25 0.078 ± 0.001 us/op
> TestAdler32Perf.testAdler32Update 2048 avgt 25 0.139 ± 0.002 us/op
> TestAdler32Perf.testAdler32Update 4096 avgt 25 0.262 ± 0.004 us/op
> TestAdler32Perf.testAdler32Update 8192 avgt 25 0.524 ± 0.010 us/op
> TestAdler32Perf.testAdler32Update 16384 avgt 25 1.017 ± 0.022 us/op
> TestAdler32Perf.testAdler32Update 32768 avgt 25 2.058 ± 0.052 us/op
> TestAdler32Perf.testAdler32Update 65536 avgt 25 3.994 ± 0.013 us/op

src/hotspot/cpu/x86/macroAssembler_x86.cpp line 3249:

> 3247: void MacroAssembler::vpmulld(XMMRegister dst, XMMRegister nds, AddressLiteral src, int vector_len) {
> 3248:   // Used in sign-bit flipping with aligned address.
> 3249:   bool aligned_adr = (((intptr_t)src.target() & 15) == 0);

This is an AVX instruction. So alignment is not required. The assert need to only check for UseAVX>0.

src/hotspot/cpu/x86/stubGenerator_x86_64.cpp line 5812:

> 5810:       StubCodeMark mark(this, "StubRoutines", "updateBytesAdler32");
> 5811: 
> 5812:       address start = __ pc();

The algorithm part can go into macroAssembler_x86_adler.cpp with Intel copyright (see macroAssembler_x86_sha.cpp).

-------------

PR: https://git.openjdk.java.net/jdk/pull/3806