Integrated: 8264543: Cross modify fence optimization for x86

[Xubo Zhang]

On Tue, 20 Jul 2021 23:44:58 GMT, Xubo Zhang <github.com+58006833+xbzhang99 at openjdk.org> wrote:

> Intel introduced a new instruction “serialize” which ensures that all modifications to flags, registers, and memory by previous instructions are completed and all buffered writes are drained to memory before the next instruction is fetched and executed. It is a serializing instruction and can be used to implement cross modify fence (OrderAccess::cross_modify_fence_impl) more efficiently than using “cpuid” on supported 32-bit and 64-bit x86 platforms.
> 
> The availability of the SERIALIZE instruction is indicated by the presence of the CPUID feature flag SERIALIZE, bit 14 of the EDX register in sub-leaf CPUID:7H.0H.
> 
> https://software.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html

This pull request has now been integrated.

Changeset: 04134fcd
Author:    Xubo Zhang <xubo.zhang at intel.com>
Committer: David Holmes <dholmes at openjdk.org>
URL:       https://git.openjdk.java.net/jdk/commit/04134fcdaaf058429fc4ab109a98005ddce4636d
Stats:     73 lines in 9 files changed: 49 ins; 12 del; 12 mod

8264543: Cross modify fence optimization for x86

Reviewed-by: dholmes, tschatzl, sviswanathan

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PR: https://git.openjdk.java.net/jdk/pull/4848