RFC: AArch64: Implementing spin pauses with ISB

[Astigeevich, Evgeny]

Thank you, Andrew and Stuart, for your comments. They are very useful. I'll be updating the implementation.


On 19/08/2021, 08:34, "hotspot-dev on behalf of Andrew Haley" <hotspot-dev-retn at openjdk.java.net on behalf of aph-open at littlepinkcloud.com> wrote:

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    On 8/18/21 11:22 PM, Stuart Monteith wrote:
    > I don't think WFE will work for you - I found on at least one machine the cpu will pause more or less indefinitely.

    That's a shame. I thought it was specified to awaken when the exclusive monitor
    was cleared, which will happen when the exclusive location is written to, won't
    it?

    > The
    > SEV instruction may be a blunt weapon as it applies to all cores on the CPU.
    >
    > This discussion appears split between the Spin Pause review and this email thread, but the idea of the implementation
    > being switchable is appealing. Hypothetically the options might be NONE, NOP, ISB, YIELD. With the current semantics,
    > YIELD could be theoretically useful on SMT cores, but I don't know if that would change in the future to be applicable
    > more widely.

    Mmm, yes. I think it should be easy enough to make it switchable. I'd
    support that, I think.

    --
    Andrew Haley  (he/him)
    Java Platform Lead Engineer
    Red Hat UK Ltd. <https://www.redhat.com>
    https://keybase.io/andrewhaley
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