RFR: 8261649: AArch64: Optimize LSE atomics in C++ code [v3]

[Aleksey Shipilev]

On Thu, 18 Feb 2021 16:52:29 GMT, Andrew Haley <aph at openjdk.org> wrote:

>> Now that we have support for LSE atomics in C++ HotSpot source, we can generate much better code for them. In particular, the sequence we generate for CMPXCHG with a full two-way barrier using two DMBs is way suboptimal.
>> 
>> This patch:
>> 
>> Moves memory barriers from the atomic_linux_aarch64 file into the stubs.
>> Rewrites the LSE versions of the stubs to be more efficient.
>> Fixes a race condition in stub generation.
>> Mostly leaves the pre-LSE stubs alone, except that I added a PRFM which according to kernel engineers improves performance.
>
> Andrew Haley has updated the pull request incrementally with one additional commit since the last revision:
> 
>   Remove mistaken change.

Passer-by comments...

src/hotspot/cpu/aarch64/vm_version_aarch64.cpp line 192:

> 190:   if (_cpu == CPU_ARM && (_model == 0xd07 || _model2 == 0xd07)) _features |= CPU_STXR_PREFETCH;
> 191: 
> 192:   _features |= CPU_STXR_PREFETCH;

This looks weird. The line above it adds `CPU_STXR_PREFETCH` conditionally. Which one is correct?

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PR: https://git.openjdk.java.net/jdk/pull/2611