RFR: 8261649: AArch64: Optimize LSE atomics in C++ code [v2]

[Aleksey Shipilev]

On Thu, 18 Feb 2021 16:49:00 GMT, Andrew Haley <aph at openjdk.org> wrote:

>> Now that we have support for LSE atomics in C++ HotSpot source, we can generate much better code for them. In particular, the sequence we generate for CMPXCHG with a full two-way barrier using two DMBs is way suboptimal.
>> 
>> This patch:
>> 
>> Moves memory barriers from the atomic_linux_aarch64 file into the stubs.
>> Rewrites the LSE versions of the stubs to be more efficient.
>> Fixes a race condition in stub generation.
>> Mostly leaves the pre-LSE stubs alone, except that I added a PRFM which according to kernel engineers improves performance.
>
> Andrew Haley has updated the pull request incrementally with one additional commit since the last revision:
> 
>   Make things slightly less confusing

src/hotspot/cpu/aarch64/stubGenerator_aarch64.cpp line 5655:

> 5653:       acquire = false, release = false; break;
> 5654:     default:
> 5655:       acquire = true, release = true; break;

I think hotspot style is to indent the `case`-s. Also commas in `acquire` and `release` assignments look weird. Consider:

    Register prev = r3;
    Register ptr = c_rarg0;
    Register compare_val = c_rarg1;
    Register exchange_val = c_rarg2;

    bool acquire, release;
    switch (order) {
      case memory_order_relaxed:
        acquire = false;
        release = false;
        break;
      default:
        acquire = true;
        release = true; 
        break;
    }

-------------

PR: https://git.openjdk.java.net/jdk/pull/2611