Withdrawn: 8267968: [PPC64] Use prefixed load and addi instructions for better performance in POWER10

[Kazunori Ogata]

On Mon, 31 May 2021 05:39:25 GMT, Kazunori Ogata <ogatak at openjdk.org> wrote:

> The POWER10 processor supports prefixed load and addi instructions that have larger displacement field of up to 34-bits. We can reduce instruction cycles to load constant from TOC and load an immediate value to a register.
> 
> Assembler::{load|add}_const_optimized() and LoadCon[LPFD]Nodes are modified to use prefixed instructions, with fixing other functions that are affected by this change.
> 
> I ran jtreg test on both POWER10 and POWER8 machines by using "make test-tier1" and verified no additional fails by this change. I also ran DaCapo, Renaissance, and SPECjbb2015 on both of them and verified they run successfully.

This pull request has been closed without being integrated.

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PR: https://git.openjdk.java.net/jdk/pull/4267