RFR: 8261579: AArch64: Support for weaker memory ordering in Atomic [v4]

[Aleksey Shipilev]

On Fri, 25 Jun 2021 15:02:35 GMT, Andrew Haley <aph at openjdk.org> wrote:

>> At present the Atomic operations in HotSpot only support conservative (the very strongest) and relaxed (the weakest) memory ordering.
>> We should add at least seq_cst for LSE. This patch also adds a release-only CAS, needed for Shenandoah.
>
> Andrew Haley has updated the pull request incrementally with one additional commit since the last revision:
> 
>   Sanitize memory order for BSD CAS

Only stylistic nits. I am running the Shenandoah performance tests now.

src/hotspot/cpu/aarch64/atomic_aarch64.hpp line 52:

> 50: extern aarch64_atomic_stub_t aarch64_atomic_cmpxchg_8_seq_cst_impl;
> 51: extern aarch64_atomic_stub_t aarch64_atomic_cmpxchg_4_release_impl;
> 52: extern aarch64_atomic_stub_t aarch64_atomic_cmpxchg_8_release_impl;

Stylistic: I'd keep the ordering hierarchy here, first `release`, then `seq_cst`.

Suggestion:

extern aarch64_atomic_stub_t aarch64_atomic_cmpxchg_4_release_impl;
extern aarch64_atomic_stub_t aarch64_atomic_cmpxchg_8_release_impl;
extern aarch64_atomic_stub_t aarch64_atomic_cmpxchg_4_seq_cst_impl;
extern aarch64_atomic_stub_t aarch64_atomic_cmpxchg_8_seq_cst_impl;

src/hotspot/os_cpu/linux_aarch64/atomic_linux_aarch64.S line 122:

> 120:         cmp     w3, w1
> 121:         b.ne    1f
> 122:         stlxr    w8, w2, [x0]

Suggestion:

        stlxr   w8, w2, [x0]

src/hotspot/os_cpu/linux_aarch64/atomic_linux_aarch64.S line 134:

> 132:         cmp     x3, x1
> 133:         b.ne    1f
> 134:         stlxr    w8, x2, [x0]

Suggestion:

        stlxr   w8, x2, [x0]

src/hotspot/os_cpu/linux_aarch64/atomic_linux_aarch64.S line 143:

> 141: aarch64_atomic_cmpxchg_4_seq_cst_default_impl:
> 142:         prfm    pstl1strm, [x0]
> 143: 0:      ldaxr    w3, [x0]

Suggestion:

0:      ldaxr   w3, [x0]

src/hotspot/os_cpu/linux_aarch64/atomic_linux_aarch64.S line 146:

> 144:         cmp     w3, w1
> 145:         b.ne    1f
> 146:         stlxr    w8, w2, [x0]

Suggestion:

        stlxr   w8, w2, [x0]

src/hotspot/os_cpu/linux_aarch64/atomic_linux_aarch64.S line 155:

> 153: aarch64_atomic_cmpxchg_8_seq_cst_default_impl:
> 154:         prfm    pstl1strm, [x0]
> 155: 0:      ldaxr    x3, [x0]

Suggestion:

0:      ldaxr   x3, [x0]

src/hotspot/os_cpu/linux_aarch64/atomic_linux_aarch64.S line 158:

> 156:         cmp     x3, x1
> 157:         b.ne    1f
> 158:         stlxr    w8, x2, [x0]

Suggestion:

        stlxr   w8, x2, [x0]

src/hotspot/os_cpu/linux_aarch64/atomic_linux_aarch64.hpp line 157:

> 155:     stub = aarch64_atomic_cmpxchg_4_release_impl; break;
> 156:   case memory_order_seq_cst:
> 157:   case memory_order_acq_rel:

Swap to keep the strength hierarchy.

Suggestion:

  case memory_order_acq_rel:
  case memory_order_seq_cst:

src/hotspot/os_cpu/linux_aarch64/atomic_linux_aarch64.hpp line 180:

> 178:     stub = aarch64_atomic_cmpxchg_8_release_impl; break;
> 179:   case memory_order_seq_cst:
> 180:   case memory_order_acq_rel:

Swap to keep strength hierarchy. 

Suggestion:

  case memory_order_acq_rel:
  case memory_order_seq_cst:

-------------

PR: https://git.openjdk.java.net/jdk/pull/4597