RFR: 8262519: AArch64: Unnecessary acquire semantics of memory-order-conservative atomics in C++ Hotspot code

[Andrew Haley]

On Wed, 3 Mar 2021 08:07:35 GMT, Dong Bo <dongbo at openjdk.org> wrote:

> Without the acquire, the loads/stores after the atomic operations still can not pass the `dmb`.
> Remove the acquire does not change the order between preceding loads/stores and `stlxr`.

Looks like it. I tried this example, which makes sure that a preceding store does not pass the load in LDXR;STLXR;DMB :

 MOConservative
{ 0:X0=a; 0:X1=b; 1:X0=a; 1:X1=b; a=0; b=0; }
P0 | P1;
MOV W3, #1 | MOV W3, #1;
STLR W3, [X0] | STR W3, [X1];
LDAR W1, [X1] | LDXR W1, [X0];
              | STLXR W5, W4, [X0];
              | CBZ W5, FOO;
              | MOV W1, #99;
              | FOO: ;
              | DMB ISH;
exists
(0:X1=0 /\ 1:X1 = 0)

I don't think a preceding load can be reordered with the ```ldxr``` either, but I haven't written that test.

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PR: https://git.openjdk.java.net/jdk/pull/2788