RFR: 8267356: AArch64: Vector API SVE codegen support

[Ningsheng Jian]

This is the integration of current SVE work done in panama-vector/vectorIntrinscs, which includes:

1. Code generation for Vector API c2 IR nodes with SVE.
2. Non-max vector size support with SVE, e.g. using *128Vector (and *64Vector) APIs on 256-bit SVE environment could also generate optimized SVE instructions with predicate feature.
3. Some more SVE assemblers (and tests) used by the codegen part.

Test: tier1-3 with vector api test cases passed on 512-bit SVE hardware with MaxVectorSize=16/32/64.

Note: our original plan was making this work part of JEP 414 Vector API (Second Incubator) [1], but we realized that it's now close to 17 release cycle and the JEP process may take time. Adding more features could delay the whole review process for the JEP. So we separate this work out as a standalone patch.

[1] http://openjdk.java.net/jeps/414

-------------

Commit messages:
 - 8267356: AArch64: Vector API SVE codegen support

Changes: https://git.openjdk.java.net/jdk/pull/4122/files
 Webrev: https://webrevs.openjdk.java.net/?repo=jdk&pr=4122&range=00
  Issue: https://bugs.openjdk.java.net/browse/JDK-8267356
  Stats: 5486 lines in 10 files changed: 4556 ins; 144 del; 786 mod
  Patch: https://git.openjdk.java.net/jdk/pull/4122.diff
  Fetch: git fetch https://git.openjdk.java.net/jdk pull/4122/head:pull/4122

PR: https://git.openjdk.java.net/jdk/pull/4122