RFR: 8267968: [PPC64] Use prefixed load and addi instructions for better perfromance in POWER10

[Kazunori Ogata]

The POWER10 processor supports prefixed load and addi instructions that have larger displacement field of up to 34-bits. We can reduce instruction cycles to load constant from TOC and load an immediate value to a register.

Assembler::{load|add}_const_optimized() and LoadCon[LPFD]Nodes are modified to use prefixed instructions, with fixing other functions that are affected by this change.

I ran jtreg test on both POWER10 and POWER8 machines by using "make test-tier1" and verified no additional fails by this change. I also ran DaCapo, Renaissance, and SPECjbb2015 on both of them and verified they run successfully.

-------------

Commit messages:
 - Fix whitespace and copy right
 - Use prefixed load and addi in more places

Changes: https://git.openjdk.java.net/jdk/pull/4267/files
 Webrev: https://webrevs.openjdk.java.net/?repo=jdk&pr=4267&range=00
  Issue: https://bugs.openjdk.java.net/browse/JDK-8267968
  Stats: 463 lines in 5 files changed: 332 ins; 26 del; 105 mod
  Patch: https://git.openjdk.java.net/jdk/pull/4267.diff
  Fetch: git fetch https://git.openjdk.java.net/jdk pull/4267/head:pull/4267

PR: https://git.openjdk.java.net/jdk/pull/4267