RFR: 8275718: Relax memory constraint on exception counter updates

[Andrew Haley]

On Sun, 31 Oct 2021 11:53:36 GMT, Andrew Haley <aph at openjdk.org> wrote:

> > We had internal discussion on this topic, Aleksey pointed out: "All modifications to any particular atomic variable occur in a total order that is specific to this one atomic variable". This guarantee holds even for relaxed atomic load/stores. This is a very basic guarantee.
> 
> I think that's true for most processors as a consequence of multi-copy atomicity, but we support Power which is not multi-copy atomic, where stores can become visible to one group of threads before they become visible to all threads.

Sorry, this was something of a red herring.

My main point: imposing ordering with respect to other memory accesses around a counter increment does nothing useful unless you care about the ordering of the increment with respect to those other accesses, which AFAICS you don't in this case.

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PR: https://git.openjdk.java.net/jdk/pull/6065