RFR: 8274179: AArch64: Support SVE operations with encodable immediates [v5]

Andrew Haley aph-open at littlepinkcloud.com
Wed Nov 17 10:02:34 UTC 2021


On 11/17/21 09:57, Andrew Haley wrote:
>> 2734:   if (is_vshift_con_pattern(n, m) ||
>> 2735:       (UseSVE > 0 && m->Opcode() == Op_VectorStoreMask && n->Opcode() == Op_StoreVector) ||
>> 2736:       is_vector_arith_imm_pattern(n, m)) {
> Indent this line.

Sorry, that was a mistake.

-- 
Andrew Haley  (he/him)
Java Platform Lead Engineer
Red Hat UK Ltd. <https://www.redhat.com>
https://keybase.io/andrewhaley
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