RFR: 8275718: Relax memory constraint on exception counter updates

[Zhengyu Gu]

On Mon, 25 Oct 2021 00:22:47 GMT, David Holmes <dholmes at openjdk.org> wrote:

> What does this achieve? These are not "hot" counters so performance is of zero concern. The conservative memory ordering doesn't guarantee cross-thread visibility but it does seem to me there is less likelihood of error reporting seeing a stale value from another thread if we have "conservative" memory ordering (which traditionally should have been a full bi-directional fence for atomic r-m-w operations).
> 
> David

Hi David,

I agree that they are not "hot" counters, but I disagree that "conservative" memory ordering provides any benefits that prevent other threads from reading stale values.

We had internal discussion on this topic, Aleksey pointed out:
"All modifications to any particular atomic variable occur in a total order that is specific to this one atomic variable". This guarantee holds even for relaxed atomic load/stores. This is a very basic guarantee. 

In short, value updated via atomic r-m-w operation should be visible to other threads guaranteed by coherence protocol

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PR: https://git.openjdk.java.net/jdk/pull/6065