Integrated: 8285303: riscv: Incorrect register mask in call_native_base

[Feilong Jiang]

On Fri, 22 Apr 2022 02:02:01 GMT, Feilong Jiang <fjiang at openjdk.org> wrote:

> In `MacroAssembler::call_native_base`, t0 and xmethod should be saved as expected:
> 
> 
> void MacroAssembler::call_native_base(address entry_point, Label *retaddr) {
>   Label E, L;
>   int32_t offset = 0;
>   push_reg(0x80000040, sp); // push << t0 & xmethod >> to sp
>   movptr_with_offset(t0, entry_point, offset);
>   jalr(x1, t0, offset);
>   if (retaddr != NULL) {
>     bind(*retaddr);
>   }
>   pop_reg(0x80000040, sp); // pop << t0 & xmethod >> from sp
> }
> 
> 
> Register mask of '0x80000040' operates << t1 & xmethod >> here, which should be '0x80000020' for << t0 & xmethod >>.
> 
> This PR also removes `MacroAssembler::call_native_base` and `MacroAssembler::call_native_base`, expands the definitions of `call_native_base` to `MacroAssembler::call_VM_leaf_base` directly.
> 
> Linux RISCV64 release hotspot/jdk tier1 tests are passed on QEMU.

This pull request has now been integrated.

Changeset: b10833bb
Author:    Feilong Jiang <fjiang at openjdk.org>
Committer: Fei Yang <fyang at openjdk.org>
URL:       https://git.openjdk.java.net/jdk/commit/b10833bbf3cd33c6e6a4cf2671f587a27c606ebb
Stats:     19 lines in 2 files changed: 0 ins; 17 del; 2 mod

8285303: riscv: Incorrect register mask in call_native_base

Co-authored-by: Dingli Zhang <dingli at iscas.ac.cn>
Reviewed-by: fyang, yadongwang

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PR: https://git.openjdk.java.net/jdk/pull/8353