RFR: 8292575: riscv: Represent Registers as values [v2]

[Feilong Jiang]

On Tue, 30 Aug 2022 00:57:13 GMT, Fei Yang <fyang at openjdk.org> wrote:

>> Feilong Jiang has updated the pull request with a new target base due to a merge or a rebase. The incremental webrev excludes the unrelated changes brought in by the merge/rebase. The pull request contains two additional commits since the last revision:
>> 
>>  - Merge branch 'master' of https://github.com/openjdk/jdk into riscv-register-rep
>>  - Represent Registers as values
>
> src/hotspot/cpu/riscv/vmreg_riscv.inline.hpp line 33:
> 
>> 31: }
>> 32: 
>> 33: inline VMReg FloatRegister::FloatRegister::FloatRegisterImpl::as_VMReg() const {
> 
> Shouldn't this be: inline VMReg FloatRegister::FloatRegisterImpl::as_VMReg() const?

Yes, fixed.

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PR: https://git.openjdk.org/jdk/pull/9936