RFR: JDK-8290137: riscv: small refactoring for add_memory_int32/64

[Feilong Jiang]

On Tue, 12 Jul 2022 08:14:05 GMT, Fei Yang <fyang at openjdk.org> wrote:

> Currently, add_memory_int32/64 for riscv can only add a sign-extended 12-bit immediate to memory since they call addi/addiw assembler direcly. This constraint could be relaxed when the given memory address is in the expected form: base register plus a sign-extended 12-bit offset. In this case, we can emit code for load + add/sub + store sequence adding arbitrary immediate to memory with no more than two scratch registers (t0 and t1) available.
> 
> We could also refactor these two functions into four seperate functions: increment, incrementw, decrement and decrementw, so that it will be more clear in code logic at the call sites.
> 
> Testing: tier1 tested on riscv64-linux unmatched board.

Marked as reviewed by fjiang (Author).

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PR: https://git.openjdk.org/jdk/pull/9461