RFR: 8288992: AArch64: CMN should be handled the same way as CMP

[Evgeny Astigeevich]

On Fri, 24 Jun 2022 13:21:40 GMT, Andrew Haley <aph at openjdk.org> wrote:

>> src/hotspot/cpu/aarch64/macroAssembler_aarch64.hpp line 200:
>> 
>>> 198:   inline void cmp(Register Rd, unsigned imm) = delete;
>>> 199: 
>>> 200:   template<class T>
>> 
>> Why do we need it to be a template?
>
> If we made it `unsigned int`, we'd risk a 64-bit signed value (from C2, for example) being truncated before being passed to `addsw(Register Rd, Register Rn, uint64_t imm)`. As we now have a 64-bit-clean path through all this code, that would be a Bad Thing.

Thank you for the explanation. I reread the code and found why I got confused.
`MacroAssembler::cmnw` call `addsw` which is defined by `WRAP(addsw, true)`. 
The macro expends to

void addsw(Register Rd, Register Rn, uint64_t imm) {
    wrap_adds_subs_imm_insn(Rd, Rn, imm, &Assembler::addsw, &Assembler::addsw, true);
}

void addsw(Register Rd, Register Rn, Register Rm, enum shift_kind kind, unsigned shift = 0) {
   Assembler::addsw(Rd, Rn, Rm, kind, shift);
}

void addsw(Register Rd, Register Rn, Register Rm) {
   Assembler::addsw(Rd, Rn, Rm);
}

void addsw(Register Rd, Register Rn, Register Rm, ext::operation option, int amount = 0) {
  Assembler::addsw(Rd, Rn, Rm, option, amount);
}


I've mixed it up with `Assembler::addsw(Register Rd, Register Rn, unsigned imm)`:

#define INSN(NAME, decode, negated)                                     \
  void NAME(Register Rd, Register Rn, unsigned imm, unsigned shift) {   \
    starti;                                                             \
    f(decode, 31, 29), f(0b10001, 28, 24), f(shift, 23, 22), f(imm, 21, 10); \
    zrf(Rd, 0), srf(Rn, 5);                                             \
  }                                                                     \
                                                                        \
  void NAME(Register Rd, Register Rn, unsigned imm) {                   \
    starti;                                                             \
    add_sub_immediate(current_insn, Rd, Rn, imm, decode, negated);      \
  }

  INSN(addsw, 0b001, 0b011);

-------------

PR: https://git.openjdk.org/jdk/pull/9246