RFR: 8285923: [REDO] JDK-8285802 AArch64: Consistently handle offsets in MacroAssembler as 64-bit quantities [v2]

[Daniel D.Daugherty]

On Fri, 6 May 2022 12:03:27 GMT, Andrew Haley <aph at openjdk.org> wrote:

>> It is with some trepidation that I post this after breaking things last time. However, I think I've tested this as much as it can be tested.
>> 
>> The change from last time around is this:
>> 
>> 
>> +++ b/src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp
>> @@ -2192,11 +2192,13 @@ void MacroAssembler::unimplemented(const char* what) {
>>  
>>  // If a constant does not fit in an immediate field, generate some
>>  // number of MOV instructions and then perform the operation.
>> -void MacroAssembler::wrap_add_sub_imm_insn(Register Rd, Register Rn, unsigned imm,
>> +void MacroAssembler::wrap_add_sub_imm_insn(Register Rd, Register Rn, uint64_t imm,
>>                                             add_sub_imm_insn insn1,
>> -                                           add_sub_reg_insn insn2) {
>> +                                           add_sub_reg_insn insn2,
>> +                                           bool is32) {
>>    assert(Rd != zr, "Rd = zr and not setting flags?");
>> -  if (operand_valid_for_add_sub_immediate((int)imm)) {
>> +  bool fits = operand_valid_for_add_sub_immediate(is32 ? (int32_t)imm : imm);
>> +  if (fits) {
>>      (this->*insn1)(Rd, Rn, imm);
>> 
>> 
>> After this patch, when an add/sub instruction has a 32-bit (rather than a 64-bit) operand, we truncate the operand to signed int. We do this because `operand_valid_for_add_sub_immediate()` takes a 64-bit signed operand, but if the instruction is only 32 bits wide we must ignore the upper 32 bits. Therefore, the call site to `wrap_add_sub_imm_insn()` needs to know the operand size in order to sign extend the operand correctly.
>> 
>> Tested tier1-3, tier4 is still running but no regressions yet.
>
> Andrew Haley has updated the pull request incrementally with one additional commit since the last revision:
> 
>   8285923: [REDO] JDK-8285802 AArch64: Consistently handle offsets in MacroAssembler as 64-bit quantities

Mach5 testing:

Mach5 Tier1:
- no failures

Mach5 Tier2:
- 1 unrelated, known failure

Mach5 Tier3:
- no failures

Mach5 Tier4:
- no failures

Mach5 Tier5:
- no failures

-------------

PR: https://git.openjdk.java.net/jdk/pull/8554