RFR: 8295948: Support for Zicbop/prefetch instructions on RISC-V [v6]

[Yadong Wang]

On Fri, 4 Nov 2022 10:07:04 GMT, Ludovic Henry <luhenry at openjdk.org> wrote:

>> The OpenJDK supports generating prefetch instructions on most platforms. RISC-V supports through the Zicbop extension the use of prefetch instructions. We want to make sure we use these instructions whenever they are available.
>> 
>> It passes `hotspot:tier1` test suite
>
> Ludovic Henry has updated the pull request incrementally with one additional commit since the last revision:
> 
>   fixup! review

src/hotspot/cpu/riscv/riscv.ad line 5202:

> 5200:       __ addi(t0, as_Register($mem$$base), $mem$$disp);
> 5201:       __ prefetch_w(t0, 0);
> 5202:     }

It'd better to generate the case that handles the imm not fit for instructions like prefetch.w or addi.

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PR: https://git.openjdk.org/jdk/pull/10884