RFR: 8295948: Support for Zicbop/prefetch instructions on RISC-V [v7]

[Yadong Wang]

On Tue, 8 Nov 2022 07:34:35 GMT, Ludovic Henry <luhenry at openjdk.org> wrote:

>> The OpenJDK supports generating prefetch instructions on most platforms. RISC-V supports through the Zicbop extension the use of prefetch instructions. We want to make sure we use these instructions whenever they are available.
>> 
>> It passes `hotspot:tier1` test suite
>
> Ludovic Henry has updated the pull request incrementally with one additional commit since the last revision:
> 
>   support large disp values

src/hotspot/cpu/riscv/riscv.ad line 5197:

> 5195: 
> 5196:   ins_encode %{
> 5197:     if ((($mem$$disp) & 0x1f) == 0) {

Does this branch only check the alignment, not the allowed range?

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PR: https://git.openjdk.org/jdk/pull/10884