RFR: 8295282: Use Zicboz/cbo.zero to zero-out memory on RISC-V [v6]

[Ludovic Henry]

> Similarly to AArch64 DC.ZVA, the RISC-V Zicboz [1] extension provides the cbo.zero [2] instruction that allows to zero out memory a cache-line at a time. This should be faster than storing zeroes 64bits at a time.
> 
> [1] https://github.com/riscv/riscv-CMOs
> [2] https://github.com/riscv/riscv-CMOs/blob/master/cmobase/Zicboz.adoc#insns-cbo_zero

Ludovic Henry has updated the pull request incrementally with two additional commits since the last revision:

 - Explicit use of temp registers
 - fixup! Add -XX:CacheLineSize= to set cache line size

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Changes:
  - all: https://git.openjdk.org/jdk/pull/10718/files
  - new: https://git.openjdk.org/jdk/pull/10718/files/de0f1a28..fc7d123e

Webrevs:
 - full: https://webrevs.openjdk.org/?repo=jdk&pr=10718&range=05
 - incr: https://webrevs.openjdk.org/?repo=jdk&pr=10718&range=04-05

  Stats: 65 lines in 5 files changed: 43 ins; 0 del; 22 mod
  Patch: https://git.openjdk.org/jdk/pull/10718.diff
  Fetch: git fetch https://git.openjdk.org/jdk pull/10718/head:pull/10718

PR: https://git.openjdk.org/jdk/pull/10718