RFR: 8295703: RISC-V: Remove implicit noreg temp register arguments in MacroAssembler

[Fei Yang]

This is similar to: https://bugs.openjdk.org/browse/JDK-8295257

Remove implicit `= noreg` temporary register arguments for the three methods that still have them.
  * `load_heap_oop`
  * `store_heap_oop`
  * `load_heap_oop_not_null`

Only `load_heap_oop` is used with the implicit `= noreg` arguments.
After [JDK-8293769](https://bugs.openjdk.org/browse/JDK-8293769), the GCs only use explicitly passed in registers. This will also be the case for generational ZGC. Where it currently requires `load_heap_oop` to provide a second temporary register.

Testing: Tier1 hotspot with fastdebug build on HiFive Unmatched board.

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Commit messages:
 - 8295703: RISC-V: Remove implicit noreg temp register arguments in MacroAssembler

Changes: https://git.openjdk.org/jdk/pull/10778/files
 Webrev: https://webrevs.openjdk.org/?repo=jdk&pr=10778&range=00
  Issue: https://bugs.openjdk.org/browse/JDK-8295703
  Stats: 14 lines in 3 files changed: 0 ins; 0 del; 14 mod
  Patch: https://git.openjdk.org/jdk/pull/10778.diff
  Fetch: git fetch https://git.openjdk.org/jdk pull/10778/head:pull/10778

PR: https://git.openjdk.org/jdk/pull/10778