RFR: 8295282: Use Zicboz/cbo.zero to zero-out memory on RISC-V [v11]

[Ludovic Henry]

On Mon, 24 Oct 2022 07:39:24 GMT, Fei Yang <fyang at openjdk.org> wrote:

>> Ludovic Henry has updated the pull request incrementally with two additional commits since the last revision:
>> 
>>  - Disable block zeroing in case CacheLineSize isn't the default value
>>  - Disable UseZicboz if CacheLineSize is set by user
>
> src/hotspot/cpu/riscv/stubGenerator_riscv.cpp line 671:
> 
>> 669:   //      x29 < MacroAssembler::zero_words_block_size.
>> 670: 
>> 671:   address generate_zero_blocks() {
> 
> Could you please correct the comment at line #669 please? It looks to me that x29 is bigger than MacroAssembler::zero_words_block_size.

With the loop "Clear the remaining blocks", `x29` will be smaller than `MacroAssembler::zero_words_block_size`.

> src/hotspot/cpu/riscv/stubGenerator_riscv.cpp line 696:
> 
>> 694:       __ mv(tmp1, MacroAssembler::zero_words_block_size);
>> 695:       __ bind(loop);
>> 696:       __ blt(cnt, tmp1, done);
> 
> Can we avoid adding this one-extra "blt" instruction into the loop here?

It replaces the `bgez` from line 691. It's also required since there is no guarantee that there will be at least `MacroAssembler::zero_words_block_size` left.

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PR: https://git.openjdk.org/jdk/pull/10718