RFR: 8295282: Use Zicboz/cbo.zero to zero-out memory on RISC-V [v17]

[Ludovic Henry]

On Tue, 25 Oct 2022 09:40:13 GMT, Ludovic Henry <luhenry at openjdk.org> wrote:

>> Similarly to AArch64 DC.ZVA, the RISC-V Zicboz [1] extension provides the cbo.zero [2] instruction that allows to zero out memory a cache-line at a time. This should be faster than storing zeroes 64bits at a time.
>> 
>> [1] https://github.com/riscv/riscv-CMOs
>> [2] https://github.com/riscv/riscv-CMOs/blob/master/cmobase/Zicboz.adoc#insns-cbo_zero
>
> Ludovic Henry has updated the pull request incrementally with three additional commits since the last revision:
> 
>  - cleanup
>  - Revert "Enable Block Zeroing when Usez64b is enabled only"
>    
>    This reverts commit 021f53d9ec3d87be2d85b3a159db30e5960c47e0.
>  - Fix prefetch_w encoding
>    
>    Reference at:
>    https://github.com/riscv/riscv-CMOs/blob/master/cmobase/insns/prefetch.i.adoc
>    https://github.com/riscv/riscv-CMOs/blob/master/cmobase/insns/prefetch.r.adoc
>    https://github.com/riscv/riscv-CMOs/blob/master/cmobase/insns/prefetch.w.adoc

Failures in `linux-cross-compile` are due to a failure to install gcc. It builds and pass `hotspot:tier1_compiler` tests locally.

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PR: https://git.openjdk.org/jdk/pull/10718