RFR: 8293351: Add second tmp register to aarch64 BarrierSetAssembler::load_at [v4]

Tue Sep 6 06:24:38 UTC 2022

> Add a second tmp register to the BarrierSetAssembler::load_at GC API for aarch64.
> 
> Today G1 and Shenandoah uses a second temporary register. This will also be the case for generational ZGC.
> 
> Testing: Oracle platforms tier 1-3

Axel Boldt-Christmas has updated the pull request incrementally with one additional commit since the last revision:

  Make tmp register names consistent g1BarrierSetAssembler_aarch64

-------------

Changes:
  - all: https://git.openjdk.org/jdk/pull/10161/files
  - new: https://git.openjdk.org/jdk/pull/10161/files/7f604f84..ad5a7694

Webrevs:
 - full: https://webrevs.openjdk.org/?repo=jdk&pr=10161&range=03
 - incr: https://webrevs.openjdk.org/?repo=jdk&pr=10161&range=02-03

  Stats: 9 lines in 2 files changed: 0 ins; 0 del; 9 mod
  Patch: https://git.openjdk.org/jdk/pull/10161.diff
  Fetch: git fetch https://git.openjdk.org/jdk pull/10161/head:pull/10161

PR: https://git.openjdk.org/jdk/pull/10161