RFR: 8294087: RISC-V: RVC: Fix a potential alignment issue and add more alignment assertions for the patchable calls/nops [v2]

[Xiaolin Zheng]

On Wed, 21 Sep 2022 08:53:48 GMT, Feilong Jiang <fjiang at openjdk.org> wrote:

>> Xiaolin Zheng has updated the pull request incrementally with two additional commits since the last revision:
>> 
>>  - Modifications as to review comments
>>  - RISC-V: Fix a potential alignment issue and add more alignment assertions for the patchable calls/nops
>
> src/hotspot/cpu/riscv/macroAssembler_riscv.cpp line 94:
> 
>> 92: }
>> 93: 
>> 94: void MacroAssembler::assert_alignment() {
> 
> It's a bit weird that `assert_alignment` only checks the alignment of instruction size. Can you extend this method with a parameter like `align_size` to check any alignment? (instruction size can be the default size of the check)

Thank you, that is reasonable and I have modified it; but due to the introduction of `NativeInstruction::instruction_size` in the `macroassembler_riscv.hpp`, it seems we also need to introduce `nativeinst_riscv.hpp` in it. I was wondering is this okay, or other plans?

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PR: https://git.openjdk.org/jdk/pull/10370