RFR: 8291550: RISC-V: jdk uses misaligned memory access when AvoidUnalignedAccess enabled

[Vladimir Kempik]

Please review this attempt to remove misaligned loads and stores in risc-v specific part of jdk.

perf stat numbers for trp_lam ( misaligned loads) and trp_sam ( misaligned stores) before the patch: 

 169598      trp_lam                                          
  13562      trp_sam  


after the patch both numbers are zeroes.
I can see template interpreter to be ~40 % faster on hifive unmatched ( 1 repetition of renaissance philosophers in -Xint mode), and the same performance ( before and after the patch) on thead rvb-ice ( which supports misaligned stores/loads in hw)

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Commit messages:
 - clean up comments
 - refix branch in interp
 - inline load_unsigned_short_at_bcp
 - Fix risc-v
 - merge
 - revert codebuffer change in favor of upstream changes
 - Fix issue with index being t1 in get_cache_index_at_bcp
 - Prevent misalligned memory access in code writer and Template Interp

Changes: https://git.openjdk.org/jdk/pull/13645/files
 Webrev: https://webrevs.openjdk.org/?repo=jdk&pr=13645&range=00
  Issue: https://bugs.openjdk.org/browse/JDK-8291550
  Stats: 164 lines in 11 files changed: 104 ins; 0 del; 60 mod
  Patch: https://git.openjdk.org/jdk/pull/13645.diff
  Fetch: git fetch https://git.openjdk.org/jdk.git pull/13645/head:pull/13645

PR: https://git.openjdk.org/jdk/pull/13645