RFR: 8312569: RISC-V: Missing intrinsics for Math.ceil, floor, rint

[Vladimir Kempik]

On Wed, 2 Aug 2023 09:52:55 GMT, Ludovic Henry <luhenry at openjdk.org> wrote:

>> Hi, thanks for your review. 
>> 
>> - About NaN, INF and other special values:
>> 
>> According to RISC-V ISA paragraph 8.7 for fcvt.l instruction (Table 8.4) we have some special return values: 
>> 1) if we exceed minimum input value, or  got -INF it returns (-2^63)
>> 2) if we exceed maximum input value, or got +INF or NaN it returns (2^63-1)
>> 
>> (Also, if we exceed maximum/minimum input values on input we have already integer value, 
>> because according to IEEE754 double-precision f.p. format all doubles more +/- 2^52 are already integer values)
>> 
>> So we need to check if we got -2^63 or 2^63-1 after double->long int conversion,
>> comment lines from [src/hotspot/cpu/riscv/macroAssembler_riscv.cpp:4288](https://github.com/openjdk/jdk/pull/14991/files#diff-7a5c3ed05b6f3f06ed1c59f5fc2a14ec566a6a5bd1d09606115767daa99115bdR4288-R4291) describes how do we change result (converted_dbl -> converted_dbl_masked) and constant (mask) to check this values. I have tried to check for NaN and +-inf with just one conditional branch.
>> If we got -2^63 or 2^63-1 we return input value, therefore NaN -> NaN; +/- INF -> +/- INF; double that is already integer stays same as required by the ceil/floor/rint function descriptions.
>> 
>> - About case when we can use less instructions:
>> 
>> Of course, we can use a bit less instructions, but the main goal during intrinsic writing was minimizing count of expensive instructions (so instead of flt.d was used integer instructions on converted_dbl etc.)
>> We already have some cases when less expensive instructions were chosen instead of reducing their number. For example: https://bugs.openjdk.org/browse/JDK-8297359
>
> Generally speaking, I'm a bit concerned we are over-optimizing for HiFive Unmatched (or equivalent "small" boards). I understand this is what we have today, and that there is no great way to project performance otherwise (maybe [llvm-mca](https://www.llvm.org/docs/CommandGuide/llvm-mca.html) but I haven't played with it), I just wish there were already broadly available high-performance RISC-V board (soon...)
> 
> Happy to go with that approach for now, and we can revisit the specific instruction sequence when we have more powerful boards to benchmark with.

It also should be available on public market, so anyone can reproduce results claimed in PR
so far it's only hifive u74 and thead c910, hence we mostly mention results from these two ( but testing a bit more)

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PR Review Comment: https://git.openjdk.org/jdk/pull/14991#discussion_r1281712339