RFR: 8320397: RISC-V: Avoid passing t0 as temp register to MacroAssembler:: cmpxchg_obj_header/cmpxchgptr [v2]

Wed Dec 13 13:10:38 UTC 2023

On Wed, 13 Dec 2023 10:19:51 GMT, Robbin Ehn <rehn at openjdk.org> wrote:

> Thank you! Looks good to me!
> 
> Can you do a tier1 on latest to make sure?

Yes, I ran the tier1 test on qemu 8.1.50 with UseRVV(release)

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PR Comment: https://git.openjdk.org/jdk/pull/16880#issuecomment-1853887978