RFR: 8320397: RISC-V: Avoid passing t0 as temp register to MacroAssembler:: cmpxchg_obj_header/cmpxchgptr [v2]

[Fei Yang]

On Thu, 14 Dec 2023 10:26:46 GMT, Robbin Ehn <rehn at openjdk.org> wrote:

>> I think we can pretty easy add a scoped object, similar to uncompressed region, where we can white-list registers.
>> 
>> So the ad file would add for example to fast_lock:
>> 
>> 
>> {
>>   AllowAdditionalRegister(t1); // As we kill cr fastlock may use t1/(cr) in addition to t0 and passed in regs.
>>   ___ fastlock(...);
>> }
>
> Anyhow something to think about.

Your proposal sounds interesting. It's like a way of self-checking/assertion about `t1` register usage. The masm could stop when it sees usage of `t1` in a scope without an `AllowAdditionalRegister(t1)`. But I am not sure if there is a good place for us to add checking for that purpose.

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PR Review Comment: https://git.openjdk.org/jdk/pull/16880#discussion_r1426599022