RFR: 8320397: RISC-V: Avoid passing t0 as temp register to MacroAssembler:: cmpxchg_obj_header/cmpxchgptr [v2]

[Gui Cao]

On Thu, 14 Dec 2023 10:26:46 GMT, Robbin Ehn <rehn at openjdk.org> wrote:

>> I think we can pretty easy add a scoped object, similar to uncompressed region, where we can white-list registers.
>> 
>> So the ad file would add for example to fast_lock:
>> 
>> 
>> {
>>   AllowAdditionalRegister(t1); // As we kill cr fastlock may use t1/(cr) in addition to t0 and passed in regs.
>>   ___ fastlock(...);
>> }
>
> Anyhow something to think about.

@robehn @RealFYang I have done a check and no cr is being used and have removed the extra kill cr. 
please take another look, thanks.

-------------

PR Review Comment: https://git.openjdk.org/jdk/pull/16880#discussion_r1426817191