RFR: 8319716: RISC-V: Add SHA-2 [v5]

[Robbin Ehn]

On Tue, 28 Nov 2023 14:14:57 GMT, Robbin Ehn <rehn at openjdk.org> wrote:

>> src/hotspot/cpu/riscv/stubGenerator_riscv.cpp line 4215:
>> 
>>> 4213:     __ vslidedown_vi(v16, v27, 2);                   // v16 = {_,_,e,f}
>>> 4214:     // Merge elements [3..2] of v26 ({a,b}) into elements [3..2] of v16
>>> 4215:     __ vmerge_vvm(v16, v26, v16);                    // v16 = {a,b,e,f}
>> 
>> Simlar here. Can we make use of index-load and index-store to simplify the code for the 512 case too?
>
> Not yet addressed.

Fixed

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PR Review Comment: https://git.openjdk.org/jdk/pull/16562#discussion_r1427850711