RFR: 8318158: RISC-V: implement roundD/roundF intrinsics [v8]

[Olga Mikhaltsova]

On Tue, 19 Dec 2023 01:03:54 GMT, Fei Yang <fyang at openjdk.org> wrote:

>> Olga Mikhaltsova has updated the pull request incrementally with one additional commit since the last revision:
>> 
>>   Used jint_cast/julong_cast; moved mv between feq and beqz
>
> src/hotspot/cpu/riscv/macroAssembler_riscv.cpp line 4264:
> 
>> 4262: void MacroAssembler::java_round_float(Register dst, FloatRegister src, FloatRegister ftmp) {
>> 4263:   Label done;
>> 4264:   li(t0, jint_cast(0.5f));
> 
> Nit: Can you change this `li` into `mv`? That will be consistent with other places where we move an immediate.

Fixed. Thanks!

> src/hotspot/cpu/riscv/macroAssembler_riscv.cpp line 4281:
> 
>> 4279: void MacroAssembler::java_round_double(Register dst, FloatRegister src, FloatRegister ftmp) {
>> 4280:   Label done;
>> 4281:   li(t0, julong_cast(0.5));
> 
> Same as above here.

Fixed. Thanks!

-------------

PR Review Comment: https://git.openjdk.org/jdk/pull/16382#discussion_r1432008377
PR Review Comment: https://git.openjdk.org/jdk/pull/16382#discussion_r1432008488