RFR: 8319716: RISC-V: Add SHA-2 [v7]

[Robbin Ehn]

On Thu, 21 Dec 2023 13:42:47 GMT, Robbin Ehn <rehn at openjdk.org> wrote:

>> src/hotspot/cpu/riscv/stubGenerator_riscv.cpp line 4039:
>> 
>>> 4037:       __ vslideup_vi(v16, v27, 2);                     // v16 = {d,c,_,_}
>>> 4038:       // Merge elements [1..0] of v26 ({a,b}) into elements [1..0] of v16
>>> 4039:       __ vmerge_vvm(v16, v16, v26);                    // v16 = {d,c,b,a}
>> 
>> Hi, Great to see that we are switching to use index-load to get {f,e,b,a},{h,g,d,c} pre-loop. But I was also expecting to use index-store to put {f,e,b,a},{h,g,d,c} back to {a,b,c,d},{e,f,g,h} post-loop as I mentioned in my previous comment [1]. Seems that was missed? I would prefer to have this change before we go.
>> 
>> [1] https://github.com/openjdk/jdk/pull/16562#discussion_r1393767555
>
> Yes, I missed that, thanks!

Fixed

-------------

PR Review Comment: https://git.openjdk.org/jdk/pull/16562#discussion_r1434160069