RFR: 8318158: RISC-V: implement roundD/roundF intrinsics [v11]

[Olga Mikhaltsova]

On Thu, 21 Dec 2023 15:22:11 GMT, Hamlin Li <mli at openjdk.org> wrote:

>> Olga Mikhaltsova has updated the pull request incrementally with one additional commit since the last revision:
>> 
>>   Fix comments
>
> Thanks for updating.
> Yes, some like that make it better.
> 
> Maybe more comments about the trick of `+ 0.5`? You could refere to comments at  https://github.com/openjdk/jdk/blob/master/src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp#L5899.
> 
> BTW, some minor comments:
> 1. can you move the code added in src/hotspot/cpu/riscv/macroAssembler_riscv.cpp up to line 4241? Just to move it out of the block of a bunch of macro definitions.
> 2. And, comment style, maybe change from `/**/` back to `//`, which is consistent with other comments for non-macro code.

@Hamlin-Li Thanks for your advices! Fixed. IMHO this will be enough, otherwise, for clearlier understanding, a specific example should be given in the comments showing that the rounding ties to positive infinity is equal to calling sequentially of fadd with RDN and fcvt with RDN.

-------------

PR Comment: https://git.openjdk.org/jdk/pull/16382#issuecomment-1867046416