RFR: 8319716: RISC-V: Add SHA-2 [v8]

[Hamlin Li]

On Fri, 22 Dec 2023 12:38:22 GMT, Fei Yang <fyang at openjdk.org> wrote:

>> The sha instruction don't care about lmul, except only in that lmul*vlen == 256.
>> So there is no code difference except just setting m2 in case of 128.
>> These crypto uses 'EGW' element group width which is specified.
>> As quad rounds depend on result from previous quad round, you can only do 4xe64(for 256 e32), no more no less.
>> 
>> Yes, good catch! I must remember to tests multiple vlens. Thanks!
>
> I suppose we would need some more if conditions to distinguish the register usage for the sha512 case in places like indexed load/store, message block load, etc. Because we will work with vector register pairs as indicated by `m2` for this case. I am not sure if that's a good way.

Is it possible to just use one pieice of code to work for both sha-256/sha-512? I mean without conditions everywhere. As the difference between 256/512 is just some contants and rounds number.

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PR Review Comment: https://git.openjdk.org/jdk/pull/16562#discussion_r1435028334