RFR: 8300253: Introduce AArch64 nzcv accessors [v2]

[Erik Österlund]

On Thu, 19 Jan 2023 09:03:44 GMT, Andrew Haley <aph at openjdk.org> wrote:

>> I suggest adding one comment here. How about:
>> 
>> // macro instructions for accessing and updating 
>> // PSTATE.{N,Z,C,V} fields at EL0
>> //
>> // NZCV:  op1 = 011
>> //        CRn = 0100
>> //        CRm = 0010
>> //        op2 = 000
>
> As a general rule, we don't add commentary that duplicates information in the Architecture Reference Manual. In this case, it's obvious that `MRS <Xt>, NZCV` is intended, and the information above is on Page C5-689 of ARM DDI 0487H.a

> OK, I'm not wild about checking in dead code, but if it's imminently needed, OK. Please add the instructions to `test/hotspot/gtest/aarch64/aarch64-asmtest.py` so they get tested..

I added mrs and msr tests for the system registers we use to aarch64-asmtest.py

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PR: https://git.openjdk.org/jdk/pull/12038