RFR: 8301036: RISC-V: Factor out functions baseOffset & baseOffset32 from MacroAssembler [v2]

[Ludovic Henry]

On Thu, 26 Jan 2023 03:37:46 GMT, Fei Yang <fyang at openjdk.org> wrote:

>> On RISC-V, functions baseOffset & baseOffset32 from MacroAssembler receive an Address in base_plus_offset mode. These two functions check the range of the offset, add it and base and put the result in a destination register. This duplicates function MacroAssembler::la in functionality. We could refactor this part moving the logic of Address legitimization into MacroAssembler::la and use this function instead.
>> 
>> Testing:
>>   - [x] Bootcycle (release & fastdebug)
>>   - [x] Tier1-4 (release)
>>   - [x] Benchmarks: SPECjbb2015 (release)
>
> Fei Yang has updated the pull request with a new target base due to a merge or a rebase. The incremental webrev excludes the unrelated changes brought in by the merge/rebase. The pull request contains three additional commits since the last revision:
> 
>  - Comment
>  - Merge branch 'master' into JDK-8301036
>  - 8301036: RISC-V: Factor out functions baseOffset & baseOffset32 from MacroAssembler

Marked as reviewed by luhenry (Committer).

src/hotspot/cpu/riscv/macroAssembler_riscv.cpp line 2394:

> 2392: 
> 2393:   assert(Rd != noreg, "expecting a register");
> 2394:   assert_different_registers(Rd, base);

You can also do `assert_different_registers(Rd, base, noreg);` to cut down on the checks, except if `base` can be a `noreg`.

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PR: https://git.openjdk.org/jdk/pull/12177