RFR: 8310656: RISC-V: __builtin___clear_cache can fail silently. [v2]

[Robbin Ehn]

On Sat, 1 Jul 2023 00:28:54 GMT, Fei Yang <fyang at openjdk.org> wrote:

>> Robbin Ehn has updated the pull request incrementally with one additional commit since the last revision:
>> 
>>   added back data barrier
>>   
>>   Signed-off-by: Robbin Ehn <rehn at rivosinc.com>
>
> src/hotspot/os_cpu/linux_riscv/riscv_flush_icache.cpp line 62:
> 
>> 60: bool RiscvFlushIcache::test() {
>> 61:   long ret;
>> 62:   intptr_t end = ((intptr_t)&ret) + 64;
> 
> It looks a little bit odd to me here as `ret` is only 8 bytes. Maybe define a local array of 64 bytes and operate on that?

We are not flushing ret, but the one/two cachelines around ret, since we know they are valid. (we just created the current frame(s) on to it)
Ret is only used to get an stack address in current frame, i.e.. it could have been char just as well.

But I can change since this was obviously not clear.

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PR Review Comment: https://git.openjdk.org/jdk/pull/14670#discussion_r1248763336