Integrated: 8311862: RISC-V: small improvements to shift immediate instructions

[Ilya Gavrilin]

On Tue, 11 Jul 2023 09:02:39 GMT, Ilya Gavrilin <duke at openjdk.org> wrote:

> Please review this small change for slli srli and srai
> slli change allows to replace slli Rd, Rs, 0 with addi Rd, Rs, 0 (and no operation emited if Rd == Rs)
> addi with 0 has higher chances to be just a register renaming and not utilise ALU at all
> We have observed small positive effect on hifive (and no change on thead).
> 
> testing: tier1 and tier2 on hifive, also hotspot/jtreg/compiler/intrinsics/string tests on Qemu with UseZba
> 
> performance on hifive, before:
> |              Benchmark              | Mode | Cnt |   Score  |   |  Error  | Units |
> |:-----------------------------------:|:----:|:---:|:--------:|:-:|:-------:|:-----:|
> | StringIndexOf.advancedWithShortSub1 | avgt |  25 | 4035.143 | ± | 191.262 | ns/op |
> | StringIndexOf.advancedWithShortSub2 | avgt |  25 | 1145.807 | ± |  14.610 | ns/op |
> 
> with patch:
> |              Benchmark              | Mode | Cnt |   Score  |   |  Error  | Units |
> |:-----------------------------------:|:----:|:---:|:--------:|:-:|:-------:|:-----:|
> | StringIndexOf.advancedWithShortSub1 | avgt |  25 | 3613.943 | ± | 178.153 | ns/op |
> | StringIndexOf.advancedWithShortSub2 | avgt |  25 | 923.169 | ± |  47.123| ns/op |

This pull request has now been integrated.

Changeset: f3b96f69
Author:    Ilya Gavrilin <ilya.gavrilin at syntacore.com>
Committer: Vladimir Kempik <vkempik at openjdk.org>
URL:       https://git.openjdk.org/jdk/commit/f3b96f6937395246f09ac2ef3dfca5854217a0da
Stats:     14 lines in 1 file changed: 12 ins; 0 del; 2 mod

8311862: RISC-V: small improvements to shift immediate instructions

Reviewed-by: luhenry, fjiang, fyang

-------------

PR: https://git.openjdk.org/jdk/pull/14823